/*********************************************************************
* Flowcode CAL ADC File
*
* File: AVR_CAL_ADC.c
*
* (c) 2011 Matrix Multimedia Ltd.
* http://www.matrixmultimedia.com
*
* Software License Agreement
*
* The software supplied herewith by Matrix Multimedia Ltd (the
* “Company”) for its Flowcode graphical programming language is
* intended and supplied to you, the Company’s customer, for use
* solely and exclusively on the Company's products. The software
* is owned by the Company, and is protected under applicable
* copyright laws. All rights are reserved. Any use in violation
* of the foregoing restrictions may subject the user to criminal
* sanctions under applicable laws, as well as to civil liability
* for the breach of the terms and conditions of this licence.
*
* THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
* TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT,
* IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR
* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
*
* Changelog:
*
* date | by | description
* -------+----+-----------------------------------------------------
* 060911 | BR | Created
* 210911 | BR | Updated to include all ADC type files
* 020312 | BR | Updated to v5.1 CAL Schema
* 230512 | BR | Added XMEGA functionality
*/
//ADC Function Prototypes
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge);
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode);
void FC_CAL_Disable_ADC (void);
//ADC Global Variables
MX_UINT8 old_tris, tris_mask;
MX_UINT8 * tris_reg; //TRIS register pointer
/* ADC Type 1 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_1
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
Vref = 1 - Vref;
tris_reg = (MX_UINT8*) &DDRA;
old_tris = *tris_reg;
*tris_reg &= ~(1 << Channel); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 2 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_2
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
Vref = 1 - Vref;
tris_reg = (MX_UINT8*) &DDRC;
old_tris = *tris_reg;
*tris_reg &= ~(1 << Channel); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 3 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_3
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
Vref = 1 - Vref;
tris_reg = (MX_UINT8*) &DDRF;
old_tris = *tris_reg;
*tris_reg &= ~(1 << Channel); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 4 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_4
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
tris_mask = Channel;
if (Channel > 2)
tris_mask++;
if (Channel < 7)
{
tris_reg = (MX_UINT8*) &DDRA;
}
else
{
tris_mask -= 4;
tris_reg = (MX_UINT8*) &DDRB;
}
old_tris = *tris_reg;
*tris_reg &= ~(1 << tris_mask); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 5 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_5
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
tris_mask = Channel;
if (Channel != 3)
{
if (Channel == 0)
tris_mask = 5;
else tris_mask <<= 1;
}
tris_reg = (MX_UINT8*) &DDRB;
old_tris = *tris_reg;
*tris_reg &= ~(1 << tris_mask); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 6 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_6
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
tris_reg = (MX_UINT8*) &DDRA;
old_tris = *tris_reg;
*tris_reg &= ~(1 << Channel); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 7 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_7
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
tris_mask = Channel;
if (Channel > 2)
tris_mask++;
if (Channel < 7)
{
tris_reg = (MX_UINT8*) &DDRA;
}
else
{
tris_mask -= 4;
tris_reg = (MX_UINT8*) &DDRB;
}
old_tris = *tris_reg;
*tris_reg &= ~(1 << tris_mask); //turn selected ADC on
ADCSR = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSR |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSR & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSR &= ~(1 << ADEN);
}
#endif
/* ADC Type 8 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_8
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
tris_reg = (MX_UINT8*) &DDRC;
old_tris = *tris_reg;
*tris_reg &= ~(1 << Channel); //turn selected ADC on
ADCSR = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSR |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSR & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCH << 8); //10-bit ADC
iRetVal |= ADCL;
}
else
{
iRetVal = (ADCH << 6); //8-bit ADC
iRetVal |= (ADCL >> 2);
}
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSR &= ~(1 << ADEN);
}
#endif
/* ADC Type 9 Supported Devices ************************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_9
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
tris_reg = (MX_UINT8*) &DDRA;
old_tris = *tris_reg;
*tris_reg &= ~(1 << Channel); //turn selected ADC on
ADCSR = (1 << ADEN) | Conv_Speed;
ADMUX = Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSR |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSR & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCH << 8); //10-bit ADC
iRetVal |= ADCL;
}
else
{
iRetVal = (ADCH << 6); //8-bit ADC
iRetVal |= (ADCL >> 2);
}
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSR &= ~(1 << ADEN);
}
#endif
/* ADC Type 10 Supported Devices ***********************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_10
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
Vref = 1 - Vref;
tris_mask = Channel;
tris_mask &= 0x07;
if (Channel < 7)
{
tris_reg = (MX_UINT8*) &DDRF;
}
else
{
tris_mask -= 4;
tris_reg = (MX_UINT8*) &DDRK;
}
clear_bit(ADCSRB, MUX5);
old_tris = *tris_reg;
*tris_reg &= ~(1 << tris_mask); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 11 Supported Devices ***********************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_11
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
Vref = 1 - Vref;
if (Channel == 0)
{
tris_mask = 0;
tris_reg = (MX_UINT8*) &DDRE;
}
else
{
if (Channel < 4)
{
tris_mask = Channel + 3;
tris_reg = (MX_UINT8*) &DDRD;
}
else
{
switch (Channel)
{
case (4):
tris_mask = 7;
break;
case (5):
tris_mask = 2;
break;
case (6):
tris_mask = 5;
break;
case (7):
tris_mask = 6;
break;
}
tris_reg = (MX_UINT8*) &DDRB;
}
}
old_tris = *tris_reg;
*tris_reg &= ~(1 << tris_mask); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 12 Supported Devices ***********************************************************
// Unknown
*******************************************************************************************/
#ifdef MX_ADC_TYPE_12
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
Vref = 1 - Vref;
if (Channel == 0)
{
tris_mask = 0;
tris_reg = (MX_UINT8*) &DDRE;
}
else
{
if (Channel < 4)
{
tris_mask = Channel + 3;
tris_reg = (MX_UINT8*) &DDRD;
}
else if (Channel > 7)
{
tris_mask = Channel - 4;
tris_reg = (MX_UINT8*) &DDRD;
}
else
{
switch (Channel)
{
case (4):
tris_mask = 7;
break;
case (5):
tris_mask = 2;
break;
case (6):
tris_mask = 5;
break;
case (7):
tris_mask = 6;
break;
}
tris_reg = (MX_UINT8*) &DDRB;
}
}
old_tris = *tris_reg;
*tris_reg &= ~(1 << tris_mask); //turn selected ADC on
ADCSRA = (1 << ADEN) | Conv_Speed;
ADMUX = (Vref << REFS0) | (1 << ADLAR) | Channel;
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
ADCSRA |= (1 << ADSC); //begin conversion and wait until it has finished
while(ADCSRA & (1 << ADSC));
if (Sample_Mode)
{
iRetVal = (ADCL >> 6); //10-bit ADC
iRetVal |= (ADCH << 2);
}
else
iRetVal = ADCH; //8-bit ADC
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
ADCSRA &= ~(1 << ADEN);
}
#endif
/* ADC Type 13 Supported Devices ***********************************************************
// ATXMEGA Device Family
*******************************************************************************************/
#ifdef MX_ADC_TYPE_13
MX_UINT8 mx_adcport;
void FC_CAL_Enable_ADC (MX_UINT8 Channel, MX_UINT8 Conv_Speed, MX_UINT8 Vref, MX_UINT8 T_Charge)
{
if (Channel < 8)
{
tris_mask = Channel;
tris_reg = (MX_UINT8*) &PORTA.DIR;
mx_adcport = 'A';
}
else
{
tris_mask = Channel - 8;
tris_reg = (MX_UINT8*) &PORTB.DIR;
mx_adcport = 'B';
}
old_tris = *tris_reg;
*tris_reg &= ~(1 << tris_mask);
if (mx_adcport == 'A')
{
ADCA.CTRLA = (1 << ADC_ENABLE_bp); //turn selected ADC on
ADCA.PRESCALER = Conv_Speed;
ADCA.REFCTRL = (Vref << ADC_REFSEL1_bp);
ADCA.CH0.CTRL = 0x01; //Single ended sample mode - 1x gain
ADCA.CH0.MUXCTRL = (Channel << 3);
}
else
{
ADCB.CTRLA = (1 << ADC_ENABLE_bp); //turn selected ADC on
ADCB.PRESCALER = Conv_Speed;
ADCB.REFCTRL = (Vref << ADC_REFSEL1_bp);
ADCB.CH0.CTRL = 0x01; //Single ended sample mode - 1x gain
ADCB.CH0.MUXCTRL = (Channel << 3);
}
delay_us(T_Charge); //wait the acquisition time
}
MX_UINT16 FC_CAL_Sample_ADC (MX_UINT8 Sample_Mode)
{
MX_UINT16 iRetVal;
if (mx_adcport == 'A')
{
ADCA.INTFLAGS |= 1; //Clear CH0 interrupt flag if set
ADCA.CTRLA |= (1 << ADC_CH0START_bp); //begin conversion and wait until it has finished
while((ADCA.INTFLAGS & 1) == 0); //Wait for sample to end
if (Sample_Mode)
{
iRetVal = ADCA.CH0RESL; //12-bit ADC
iRetVal |= (ADCA.CH0RESH << 8);
}
else
{
iRetVal = (ADCA.CH0RESL >> 4); //8-bit ADC
iRetVal |= (ADCA.CH0RESH << 4);
}
}
else
{
ADCB.INTFLAGS |= 1; //Clear CH0 interrupt flag if set
ADCB.CTRLA |= (1 << ADC_CH0START_bp); //begin conversion and wait until it has finished
while((ADCB.INTFLAGS & 1) == 0); //Wait for sample to end
if (Sample_Mode)
{
iRetVal = ADCB.CH0RESL; //12-bit ADC
iRetVal |= (ADCB.CH0RESH << 8);
}
else
{
iRetVal = (ADCB.CH0RESL >> 4); //8-bit ADC
iRetVal |= (ADCB.CH0RESH << 4);
}
}
return (iRetVal);
}
void FC_CAL_Disable_ADC ()
{
*tris_reg = old_tris; //restore old tris value, and reset adc registers
if (mx_adcport == 'A')
{
ADCA.CTRLA &= ~(1 << ADC_ENABLE_bp); //turn selected ADC off
}
else
{
ADCB.CTRLA &= ~(1 << ADC_ENABLE_bp); //turn selected ADC off
}
}
#endif
bond писал(а):
1. Это занятие для меня ново, потому это нормально.
2. Вот что получилось,только опора там из вне
bond писал(а):1. Вроде все так же как у тебя,а у тебя как надо.
2. Не могу ответить на поставленные вопросы.Ладно,буду разбираться.
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